This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-181959, filed Jun. 16, 2000, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to an inverter device for driving a motor serving as a power source of a rotary machine such as a fan, pump, mill and crane, at various speeds, and more specifically to a remodeled version of the control mode.
2. Description of the Related Art
FIG. 1 is a block diagram showing a structure of a conventional current-type inverter device which can drive a power source motor for rotary machine, at various speeds.
A main circuit portion A includes a commercially available alternating power source 1, an alternating-direct forward conversion circuit 2, a smoothing direct-current reactor 3 and a direct-alternating inverse conversion circuit 4. An alternating current output from the inverse conversion circuit 4 is supplied to a motor 11 serving as a power source for rotating a rotary machine load 12.
It should be noted that the inverse conversion circuit 4 has a structure in which six semiconductor switching elements (thyristors) 5 to 10 are connected in bridge. More specifically, the semiconductor switching elements 5 and 6 are provided to correspond to upper and lower arms in pair for a U-phase in the figure. Similarly, the semiconductor switching elements 7 and 8 are provided to correspond to a pair of arms for a V-phase, and the semiconductor switching elements 9 and 10 are provided to correspond to a pair of arms for a W-phase. With this structure, positive and negative currents corresponding to each of the U-phase, V-phase and W-phase are extracted from the mid-connection point between a pair of semiconductor switching elements in a respective phase.
A control circuit unit B includes an I/O unit 17 which relays input/output signals, a system control unit 14 which outputs an output voltage command Vdcs and a frequency command fos on the basis of an external signal Sx input from an external input terminal 13, a switching control unit 15 which controls the switching of the inverse conversion circuit 4 with use of an ON-OFF control signal Sc generated on the basis of the frequency command fos, and a forward conversion control unit 19 which controls an output voltage from the forward conversion circuit 2 on the basis of the output voltage command Vdsc. The system control unit 14 and the switching control unit 15 are contained in a processor 16, and the processor 16 and the I/O unit 17 for relaying input/output signals are contained in a digital control device 18.
FIGS. 2A and 2B are diagrams illustrating the operation of an electrical current type inverter device shown in FIG. 1. FIG. 2A is a diagram showing the ON-OFF state of each of the six semiconductor switching elements 5 to 10 in the inverse conversion circuit 4 in the case where the above device is operated in a xe2x80x9c120xc2x0 conduction modexe2x80x9d. FIG. 2B is a diagram illustrating inverter output current waveforms obtained by the ON-OFF operations of the semiconductor switching elements 5 to 10.
More specifically, in a xe2x80x9c120xc2x0 conduction modexe2x80x9d, the six semiconductor switching elements 5 to 10 of the inverse conversion circuit 4 in the electrical current type inverter device are turned on one after another as shown in FIG. 2A. As a result, the phase currents are output each for a period of 120xc2x0 with respect to an output cycle (1 cycle=360xc2x0) as shown in FIG. 2B. In this case, the frequency of the output current is controlled by increasing/decreasing the timing width P shown in FIG. 2A.
FIG. 3 is an explanatory diagram illustrating a digital control processing mode in a processor 16 of the electrical current-type inverter device shown in FIG. 1. First, the system control unit 14 starts to operate on the basis of an external signal Sx containing, for example, a request from outside or conditions for the load device. Thus, a processing cycle Tc (Tc1, Tc2 . . . ) of system control which calculates the output voltage command Vdcs and the frequency command fos, that is, the processing cycle for the processor 16, is measured. Subsequently, it is determined whether or not the ON-OFF switching is required in the six semiconductor switching elements 5 to 10 at the time where each of the processing cycles Tc1, Tc2, . . . , is finished. Then, on the basis of the determination, the ON-OFF switching control for the semiconductor switching elements 5 to 109 is executed, and thus the output frequency fo of the inverse conversion circuit 4 is controlled.
In a conventional digital control processing mode illustrated in FIG. 3, the ON-OFF switching control is carried on the six semiconductor switching elements 5 to 10 for each of the processing cycles Tc1, Tc2, . . . of the system control in the processor 16. Therefore, when the time width of each of the processing cycles Tc1, Tc2, . . . , is expanded, the time density (resolution) for determining whether or not the switching is required, is decreased, and the control accuracy for the actual output frequency fo is lowered.
Further, the processing cycles Tc1, Tc2, . . . of the system control unit 14 may vary due to several factors, and therefore the switching control which is carried out based on the cycles Tc1, Tc2, . . . , which are taken as the timing references, will have a problem of a decrease in accuracy in the actual output frequency fo, which causes an unbalance in the output current waveform. In order to prevent the occurrence of such a problem, the conventional technique needs to employ a process exclusively for inverter control or a digital control device, having a special hardware structure, in order to control the timing for switching the ON-OFF switches of the six semiconductor switching elements 5 to 10.
In the meantime, the timing for the ON-OFF switching control for the semiconductor switching elements 5 to 10 is determined on the basis of the present phase angle xcex8 where one cycle with respect to the angular frequency command value xcfx89 (=2xcfx80fo) is set to be 2xcfx80 (radian), and with regard to the elapsed time t, a relationship of xcex8=∫xcfx89xc3x97t is established. However, when the phase angle is obtained from the frequency order fos on the basis of xcex8xe2x80x2=xcfx89xc3x97t at an end of each of the processing cycles Tc1, Tc2, . . . , of the system control, there results an error between the actual phase angle xcex8 and the obtained one if the angular frequency command xcfx89 varies. Therefore, the control accuracy of the actual output frequency fo is lowered.
The object of the present invention is to provide an inverter device having the following advantages.
That is, it is possible to supply an alternating current output having a highly accurate and stable frequency, regardless of the processing cycle of the system control by the processor.
Further, the frequency control accuracy is not lowered even if the output frequency is varied as in an acceleration or deceleration.
In order to achieve the above-described object, the inverter device of the present invention is made to have the following structure.
(1) The inverter device of the present invention includes an inverse conversion circuit which converts a supplied direct-current electricity into a alternating-current electricity having a predetermined frequency, and is designed to drive a power source motor for rotary machine, at various speeds, in which the switching control of the inverse conversion circuit is performed by a digital processor. In this inverter device, a timer interrupt process with independent constant processing cycle which is not directly related to the processing cycle of the system control in the digital processor is assigned. In the assigned timer interrupt process, whether or not switching of the inverse conversion circuit is required is determined, and the switching control is carried out on the basis of the determination. In this manner, the inverter output frequency is controlled.
(2) An inverter device of the present invention according to the one recited in (1), is characterized in that the constant processing cycle in the timer interrupt process is set shorter than an average processing cycle in the system control.
(3) An inverter device of the present invention according to the one recited in (1), further comprises means for determining whether or not the switching control is required on the basis of the current phase obtained by converting the frequency set value into a phase increment amount to be set in the timer interrupt cycle, and totalizing the set value in the timer interrupt process, thus grasping the current phase.